Flexible fabrication of aligned multi-nanowire circuits for on-chip prototyping
Circuits of multiple deterministically positioned semiconductor nanowires (NWs) is the basis of many devices for photonic, quantum, or conventional transistor applications. To explore and iterate on the design of larger circuits, the means to quickly place and electrically evaluate NWs at target locations must be developed. We propose and demonstrate a multi-NW circuit building concept on SiO2/Si
